Chips to Startup Programme
Chip design support — EDA tools, IP cores, MPW fabrication and prototyping — to build India's fabless semiconductor startup ecosystem.
What you get
Project-based; support varies under the approved C2S project
Nodal ministry
Ministry of Electronics & Information Technology (MeitY)
Support type
Incubation
Best suited for
Prototype / PoC
Typical timeline
Project proposals evaluated against MeitY's prescribed format
What this scheme actually is
C2S attacks the two things that make chip design impossible for a startup: EDA tool licences that cost more than a seed round, and access to fabrication. The programme provides both, alongside IP repository access, MPW shuttle runs and mentoring, and trains specialised VLSI and embedded-system professionals over a five-year horizon. Startups participate mainly through academia-industry collaborative projects, challenges and RFPs.
What the scheme sets out to do
Who can apply
What you get
How to apply, step by step
- 1
Find an academic partner
The startup route into C2S runs largely through collaborative projects with an institution, or through challenges and RFPs. Build the academic relationship before the call.
- 2
Define the silicon deliverable
A C2S proposal is judged on the design artefact — SoC, IP core, FPGA prototype or working silicon. Vague 'we will explore' proposals do not survive review.
- 3
Submit through the C2S portal in MeitY's format
Proposals are submitted online in the prescribed format at c2s.gov.in.
- 4
Execute the design and tape-out plan
MPW shuttle schedules are fixed and unforgiving. Build the project plan backwards from the tape-out window.
What we actually do on a C2S mandate
Services this usually needs
No consultant can guarantee a sanction — that decision sits with the evaluating committee, bank or incubator. We commit to an honest eligibility view, an application built to the evaluator’s format, filing inside the window and a documented follow-up cadence. That is stated in every engagement letter we sign.